The present application relates to semiconductor manufacturing, and more particularly to a method of forming stacked germanium nanowires and stacked III-V compound semiconductor nanowires on a same substrate.
For more than three decades, the continued miniaturization of metal oxide semiconductor field effect transistors (MOSFETs) has driven the worldwide semiconductor industry. Various showstoppers to continued scaling have been predicated for decades, but a history of innovation has sustained Moore's Law in spite of many challenges. However, there are growing signs today that metal oxide semiconductor transistors are beginning to reach their traditional scaling limits. Since it has become increasingly difficult to improve MOSFETs and therefore complementary metal oxide semiconductor (CMOS) performance through continued scaling, further methods for improving performance in addition to scaling have become critical.
The use of non-planar semiconductor devices such as, for example, semiconductor nanowire field effect transistors is the next step in the evolution of complementary metal oxide semiconductor (CMOS) devices. Semiconductor nanowires with a partially or a totally surrounding gate is one ideal architecture for off-current reduction in sub-45 nm technologies. A gate-all semiconductor nanowire configuration enables to relax channel film thickness requirements for a target leakage control. Stacked semiconductor nanowires yield very high current levels per layout surface area overcoming the current limit imposed by a small width to pitch ratio.
In such semiconductor nanowire devices, there is a need for providing germanium nanowires for p-channel field effect transistors (pFETs) and III-V compound semiconductor nanowires for n-channel field effect transistors (nFETs) due to the higher mobilites observed in using the different semiconductor channel materials for each type of device.
In view of the above, there is a need to provide a method of forming stacked germanium nanowires and stacked III-V compound semiconductor nanowires on a same substrate.